Senior Logic Designer Integrator Tester, Aix-en-Provence
Senior Logic Designer Integrator Tester, Aix-en-Provence
-
Aix-en-Provence, France
-
Dernière édition le: hier
-
Ajouter
Description
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time Design engineer to join our IP / PCIe CXL team in Aix‑en‑Provence, France. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
This full‑time position will allow the candidate to develop features and reference designs to show the potential of the IP, to simulate it and to prototype it on cutting‑edge FPGA.
Rambus offers a flexible work environment, embracing a hybrid approach. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.
Responsibilities
Define reference design / example architectures to best demonstrate features of Rambus PCIe / CXL controller IP
Participate in FPGA prototyping and hardware validation
Run and improve quality checks (ASIC synthesis, CDC/RDC/Linting, simulation)
Collaborate with a worldwide team
Contribute to technical improvements on all aspects of the IP design domain
Qualifications
RTL coding: Verilog / VHDL
Master's degree or PhD in Electrical Engineering, Computer Engineering or equivalent.
2+ years of relevant experience
Good English skills, communication skills, and willingness to work with an international team.
Additional Desirable skills
Knowledge of ASIC and FPGA design flow and tools (ASIC Synthesis, CDC / RDC / Linting, Quartus, Vivado)
CI tools: Python / Jenkins / GIT
Competitive compensation package, including base salary, bonus, equity, and employee benefits.
Rambus is proud to be an Equal Employment Opportunity and affirmative action employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
#J-18808-Ljbffr
This full‑time position will allow the candidate to develop features and reference designs to show the potential of the IP, to simulate it and to prototype it on cutting‑edge FPGA.
Rambus offers a flexible work environment, embracing a hybrid approach. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.
Responsibilities
Define reference design / example architectures to best demonstrate features of Rambus PCIe / CXL controller IP
Participate in FPGA prototyping and hardware validation
Run and improve quality checks (ASIC synthesis, CDC/RDC/Linting, simulation)
Collaborate with a worldwide team
Contribute to technical improvements on all aspects of the IP design domain
Qualifications
RTL coding: Verilog / VHDL
Master's degree or PhD in Electrical Engineering, Computer Engineering or equivalent.
2+ years of relevant experience
Good English skills, communication skills, and willingness to work with an international team.
Additional Desirable skills
Knowledge of ASIC and FPGA design flow and tools (ASIC Synthesis, CDC / RDC / Linting, Quartus, Vivado)
CI tools: Python / Jenkins / GIT
Competitive compensation package, including base salary, bonus, equity, and employee benefits.
Rambus is proud to be an Equal Employment Opportunity and affirmative action employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
#J-18808-Ljbffr
Informations clefs
-
Nom de l’entrepriseRambus.com
-
Titre de posteSenior Logic Designer Integrator Tester
Conseils de Sécurité
N’acceptez pas de payer un potentiel employeur par avance afin de vous garantir une embauche.
Informations supplémentaires sur l’annonce
Senior Logic Designer Integrator Tester est visible sur Locanto dans la catégorie Aix-en-Provence Design, Conception.
Pour le moment, c’est la seule annonce dans cette catégorie pour Aix-en-Provence.
Il y a encore plus de petites annonces dans un rayon de 15 km pour cette catégorie. Cliquez ici pour consulter ces annonces.