Hardware Design Engineer / Ingénieur en conception …, Biot

Overview Ingénieur staff en conception microélectronique

Localisation:

Sophia Antipolis, France

Arteris connects innovation. Arteris permet auxéquipes d'ingénierie et de conception des marques les plus transformatrices du monde de connecter et d'intégrer les systèmes sur puce (SoC) d'aujourd'hui qui alimentent l'innovation moderne.

Si vous avez tenu un smartphone, conduit une voitureélectronique ou allumé une télévision intelligente, vous avez été en contact avec ce que nous faisons chez Arteris. Ici, l'avenir est littéralement entre vos mains - et quand ce n'est pas le cas, il y a de fortes chances qu'il soit survolé par un drone, un satellite ou dans le cloud d'un centre de données!

Le rôle consiste à concevoir et développer des composants Hardware pour les IP d'Arteris, en assurant leur qualité et leur livraison dans les temps. Vous travaillerez en étroite collaboration avec une équipe de design et de vérification sur le développement de réseaux sur puce (NoC) hautement configurables. Vous contribuerez aux discussions techniques avec les équipes d'application engineering et les clients.

What You’ll Do as a Staff Hardware Design Engineer at Arteris The role involves designing and developing hardware components for ARTERIS products, ensuring their quality and timely delivery. You will work closely with a design and verification team on the development of highly configurable network-on-chip (NoC) solutions. You will contribute to technical discussions with application engineering teams and customers.

Key Responsibilities

Design and develop hardware blocks for configurable IPs, including RTL coding and performance optimization.

Participate in writing architecture specifications for NoC components.

Develop and maintain verification environments to ensure design quality.

Collaborate with verification teams to achieve functional coverage goals.

Work closely with hardware and software teams to ensure cohesive component integration.

Participate in continuous improvement of design and verification methodologies.

Contribute to technical discussions with customers and application engineering team.

Document designs and track development progress.

What You Bring

5 to 8 years of experience in SoC/IP/NoC design

Strong knowledge of coherent and non-coherent communication protocols (AMBA, AXI, ACE, PCIe, CXL, CHI, or others)

Good understanding of CPU architectures (ARM/RISC-V) and cache systems

Hands-on experience with SoC/IP design flow (specification, architecture, RTL coding, verification, synthesis, timing and power constraints)

Strong problem-solving, communication, and teamwork skills

Proficiency in Verilog/SystemVerilog and simulation tools (Cadence/Synopsys/Mentor)

Experience with SystemC, C++, Python, or scripting languages is a plus

Fluent English (written and spoken)

Education

Master's degree (or equivalent) in electrical engineering, computer science, or related field

Rémunération Estimated base salary: €55,000 to €70,000 annually. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

About Arteris Arteris is a global leader in system IP used in semiconductors to accelerate the creation of high-performance, power-efficient silicon. Arteris NoC interconnect IP and SoC integration automation software are used by the world's top semiconductor and technology companies to improve overall performance, engineering productivity, reduce risk, lower costs, and bring complex designs to market faster. Learn more at arteris.com.

With over 300 team members headquartered in Silicon Valley and offices around the world, we work with startups and global tech leaders alike to build the next generation of electronic products. Join us and help shape what comes next.

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