Senior Digital Design Engineer - RTL / VHDL / System Verilog, Grenoble

Senior Digital Design Engineer - RTL / VHDL / System Verilog - Expanding Semiconductor company - Growth Opportunities

I'm currently on the lookout for an experienced Senior Digital Design Engineer.

You will be working for a well funded, rapidly expanding, semiconductor company that has had over€40 million in funding to continue their growth.

For this role, you will work in a dynamic team of highly motivated engineers, supporting digital design work packages from RTL to GDSII, working with the teams to drive the specification for IC digital sub-blocks and work on the journey from RTL to Netlist, designing complex blocks and integrating high-level IPs and various RTL components.

This is a permanent full time position based on-site in Grenoble.

Budgets are between€50,000-€80,000, depending on experience.

For this Senior Digital Design Engineer position, I'm interested in speaking to people with the following:

5-10+ years experience in digital design

Have good vision of the entire digital IC design flow

RTL Design and Verification experience

Experience with tools such as System Verilog, VHDL, Perl, Python etc

Experience with design and verification of digital functions for Mixed-Signal ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus

I welcome your application if you'd like to find out more and if you know someone it would suit, we offer a fantastic referral scheme which I would be happy to discuss.

Keywords: Semiconductor / Digital IC Design / Python / System Verilog / RTL

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